1. Field of the Invention This invention relates to improvements in signal processing methods and circuits, and in one aspect to methods and circuits for mixed analog and digital processing of one or more delta modulated pulse streams; and still more particularly to improvements in digital-to-analog converters, and, more particularly, to improvements of digital-to-analog converters that can be easily integrated into integrated circuits or the like with reduced power consumption and circuit area requirements; and also to improvements in digital attenuators, and, more particularly, to attenuators that can be realized without precision resistors, precision parts, or complex characteristic matching among stages.
2. Technical Background
Processing circuits and techniques employing delta- and sigma-delta-modulated signals is receiving increasing interest in many applications. To date, however, ordinarily processing techniques normally are not performed purely on a digital level, but if properly performed, many circuits that heretofore required precision parts or critical circuit trimming or adjustment can be realized using purely digital processing techniques employing delta- and sigma-delta-modulation signals.
For example, the need for faster digital to analog converters (DACs) is much greater today than in the past. Today, a wide range of applications exist for DACs, in such diverse areas as instrumentation, CAD systems, image processing, direct digital waveform synthesis, and so on. However, in fast digital manipulation systems, the DAC is the bottleneck in the link to the analog world.
The usual deciding factors in choosing a DAC are its resolution and speed. In general, the faster the DAC, the higher the resolution that can be attained. Consequently, most of today's digital to analog converters include additional digital support functions. However, the performance of an analog signal can be degraded by such additional digital circuitry, and in mixed digital-analog systems there are inevitable compromises.
Conventional digital to analog conversion usually involves analog voltages division (by two) and summation. For this process, well matched passive components, such as linear nickel-chrome resistors, or double polysilicon capacitors, are generally used. The processing costs for such linear nickel-chrome resistors, double polysilicon capacitors are relatively high.
A commonly used digital-to-analog circuit 10 of the prior art is the voltage summing, or R-2R ladder network, as shown in FIG. 1. The ladder network includes a number of resistors 11-16 of value R. The junctions between the respective resistors 11-16 are connected by resistors 18-25, of value 2R, to respective switches 30-36. The digital signal to be converted is connected to the switches 30-36 to actuate them to one or the other switch pole, depending upon the state of the bit associated with each of the switches 30-36.
If, for example, the least significant bit that actuates switch 30 is a logical "1", the switch 30 is connected to the left node that is, in turn, connected to E.sub.ref. On the other hand, if the logic state of the least significant bit controlling switch 30 is a logic "0", the switch 30 is operated to connect to the right node that is, in turn, connected to ground, or other reference potential. The operation of the remaining switches 31-36 is similar, each corresponding to the bits of the digital input signal. As is well known, the analog output seen at the output terminal E.sub.o is the sum of the voltages produced through the action of the particular "l's"of switches 30-36 that are connected to E.sub.ref, in accordance with the voltage divider ratio represented by the resistances connected thereby.
Similarly, attenuator circuits can be fabricated in a manner similar to digital-to-analog converter circuits. However attenuator circuits typically used today require precision in their construction; for example, in the provision of special precision matched resistors, component trimming, stage matching, and the like.
What is needed is a circuit and method that can employ fast digital processing techniques to accomplish digital-to-analog signal conversion, signal attenuation, and similar functions, that does not require such precision parts and construction, but which will, nevertheless provide adequate performance at reasonable cost.
In the realization of the digital processing circuits of the invention described below, a delta adder circuit is employed. One known delta adder circuit 40 (herein denoted .DELTA.A) that can be used is shown in FIG. 2, and is constructed in accordance with known techniques, as explained, for example, by N. Kouvaras, "Operations on delta-modulated signals and their applications in the realization of digital filters," The Radio and Electronics Engineer,vol. 48, No. 9, September, 1978, pp. 431-438, incorporated herein by reference.
The delta adder 40 includes a conventional binary full-adder 41 with the SUM and CARRY outputs interchanged, and a conventional D-type flip flop 42 connected to the CARRY input. Thus, digital input signals X.sub.n and Y.sub.n are applied to the "a" and "b" input terminals. The CARRY output, C.sub.n, forms the sum "S" output and the SUM output, S.sub.n, forms the carry "C" output, the connections, as mentioned, being the reverse of the normal operation of the binary adder.
The output on the SUM, "S", output of the binary adder 41 is connected to the D input of a D-type flip-flop 42, the output of which is connected to the CARRY, "c", input of the binary adder 41. Therefore, the operation of the delta adder circuit 40 of FIG. 2 is to add the digital input signals X.sub.n and Y.sub.n applied to the "a" and "b" input terminals. Assuming {X.sub.n } and {Y.sub.n } to be binary sigma-delta sequences, then the output sequences {Sn} and {Cn} are also binary sigma-delta sequences. An equivalent circuit of the Delta adder of FIG. 2 is shown in FIG. 3.